About us

Silicon Quantum Computing is pioneering the future of quantum technology. As the world’s first company to manufacture qubits with atomic precision, we’re delivering quantum advantage today, not decades from now.

Founded by Professor Michelle Simmons, one of the world’s leading materials scientists, SQC has achieved major breakthroughs including the first single-atom transistor and the first integrated circuit built with atomic precision. Our Chair, Simon Segars, former CEO of ARM, brings deep global experience as we scale our technology and commercial impact.

Our quantum machine learning chip, Watermelon, is already accelerating AI in ways classical systems can’t match. We’re generating significant revenue and working closely with multinational partners to solve complex problems with quantum solutions.

SQC is a fast-paced, high-accountability environment where people grow quickly and contribute meaningfully. If you’re excited by deep tech, ambitious about your career, and ready to help shape the future of computing, we’d love to hear from you.

About the role

SQC is embarking on an ambitious journey to develop cryo-CMOS chips that will enable the miniaturisation of electronic hardware within our quantum computers. This advancement is crucial for building larger and more complex quantum systems, ultimately supporting our vision of achieving a utility-scale quantum computer.

We are looking for a Digital Physical Design Engineer who understands that chip design is more than just clicking “run” on a tool flow. The ideal candidate has strong backend implementation experience, solid frontend awareness, and the engineering intuition to understand why a design behaves the way it does.

You should be comfortable working deep in the physical design flow, debugging timing and physical issues, and building automation to make flows robust and repeatable. If your approach to solving problems is “write a script, understand the system, and fix the root cause,” you’ll fit right in. You should be comfortable with uncertainty in design elements as we pursue the cutting edge in cryogenic environments.

This role is ideal for someone who enjoys engineering the flow as much as the design.

Role responsibilities

• Own major portions of the digital physical implementation flow, including floorplanning, placement, clock tree synthesis, routing, and timing closure

• Debug timing, congestion, power, and signal integrity issues using both tool analysis and engineering judgment

• Work with RTL designers to resolve synthesis and timing issues upstream

• Develop and maintain automation, scripts, and infrastructure to improve design productivity and repeatability

• Improve and extend EDA flows for synthesis, physical implementation, and signoff

• Investigate and resolve corner-case tool behavior rather than simply rerunning flows

• Collaborate with analog, system, and architecture teams when needed

Your experience

Essential:

• Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or a related discipline.

• Strong experience with digital physical design flows in advanced CMOS processes

• Hands-on work with tools such as Synopsys ICC2 / Fusion Compiler, Cadence Innovus, or equivalent

• Deep understanding of static timing analysis, clock tree design, floorplanning and congestion, physical effects impacting timing and power

• Experience writing automation and tooling in Python, Tcl, or similar scripting languages

• Comfortable debugging tool flows and design issues at a root-cause level

• Ability to read and understand RTL and interact productively with frontend designers

• Highly organised, detail-oriented, and able to maintain a strategic perspective in a dynamic start-up environment.

• Excellent communication skills, with the ability to explain complex technical concepts to diverse audiences.

Desirable:

• Experience with synthesis and RTL design

• Familiarity with low-power methodologies

• Experience improving or building EDA flows from scratch

• Strong debugging mindset and curiosity about how tools and silicon actually behave

• Familiarity with cryo-CMOS technology and its applications in quantum computing control.

The recruitment process

For roles at SQC, expect 3-4 interviews, meeting a few members of the team and focusing on your core eligibility for the role, your skills and how they align, and finally your values and how they align. We'll give you a more specific runthrough if you're successful in making it to the first interview.

As part of our obligations to our clients, we require that successful candidates submit to background checks, including a National Police Check, Right to Work checks, as well as employment and qualifications verification. We won't contact anyone until we're confident there's a fit between SQC and yourself.

How to apply

The best and simplest way is to apply directly here, rather than messaging anyone on the SQC team directly. If you have any questions that you'd like answered before committing to applying, please feel free to email us at careers@sqc.com.au.

Please note

This position may require access to export-controlled information (ECI) subject to EAR and ITAR. Final employment decision is contingent upon satisfactory completion of export control screenings and obtaining any necessary export licenses or approvals, based on nationality, citizenship, and other factors considered by applicable export control regulations.